This article gives an overview of V&V as well as introducing the so called V model. The V model is a representation of activities (actually forms a “V” shape), that relate to Verification and Validation activities in relation to the software development lifecycle. The Verification and Validation model is useful in order to position requirements and specifications with each other and with the ‘testing’ that happens in relation to requirements and specifications.

Although this article targets embedded systems, the concepts and terminology is relevant to V&V for most commercial software development. The article also lists so called ‘static’ software testing techniques, including walkthroughs etc. In this way the reader gets a good insight into the broad scope of V&V together with static software testing techniques as well as the typical dynamic software testing techniques (functional testing etc.).

This article puts the design specification walkthrough in the overall context of V&V. Various standards, including ISO and IEEE are cited, and a number of viewpoints are presented (computation viewpoint, engineering viewpoint, information view point, process and stakeholder viewpoint) to give a comprehensive process flow of specification V&V.

This definition of Software Verification and Validation (V&V), from Wikipedia, establishes the V&V processes within the broader Software Testing scope. The overlap between V&V is such that Software Testing is a subset of V&V. To say that all V&V is Software Testing is a stretch, as inspections, walkthroughs of all SDLC deliverables (and processes) makes up V&V.

Software Verification and Validation (V&V) working practices explained.

In order to set up an effective software testing capability the software process areas of Verification and Validation need to be understood and respected in terms of specialization.

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